rx_gleam - v0.1.1

rx/flow

Values

concat_map

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pub fn concat_map(
  source: rx.Observable(input, error),
  project: fn(input) -> future.Future(output, error),
) -> rx.Observable(output, error)

Strict FIFO async mapping.

Source values may arrive at arbitrary future times. At most one projected Future runs at once; later source values remain queued until the active Future resolves. This is the ReactiveX concatMap scheduling policy.

filter_async

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pub fn filter_async(
  source: rx.Observable(value, error),
  predicate: fn(value) -> future.Future(Bool, error),
) -> rx.Observable(value, error)

Async filter with exactly one predicate Future in flight.

filter_async_concurrent

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pub fn filter_async_concurrent(
  source: rx.Observable(value, error),
  predicate: fn(value) -> future.Future(Bool, error),
  concurrency: Int,
) -> rx.Observable(value, error)

Evaluate async predicates concurrently while preserving source order.

from_future

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pub fn from_future(
  future_: future.Future(value, error),
) -> rx.Observable(value, error)

Convert one Future into a single-value Observable.

map_async

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pub fn map_async(
  source: rx.Observable(input, error),
  project: fn(input) -> future.Future(output, error),
) -> rx.Observable(output, error)

Async map with exactly one operation in flight.

map_ordered

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pub fn map_ordered(
  source: rx.Observable(input, error),
  project: fn(input) -> future.Future(output, error),
  concurrency: Int,
) -> rx.Observable(output, error)

Concurrent async mapping that preserves input order at emission time.

Work may finish out of order, but successful results are buffered until all earlier input sequence numbers have emitted.

merge_map

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pub fn merge_map(
  source: rx.Observable(input, error),
  project: fn(input) -> future.Future(output, error),
  concurrency: Int,
) -> rx.Observable(output, error)

Concurrent async mapping with FIFO dispatch and completion-order emission.

concurrency bounds the number of projected Futures that can be active at once. New source values continue arriving asynchronously and are buffered in FIFO order until a slot becomes available.

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